Technology

Xiaomi’s Xring O1: The Game-Changing Chip That Packs a Punch

2025-05-24

Author: Siti

Introducing Xiaomi's Flagship Chipset

This week, Xiaomi unveiled its groundbreaking in-house chipset, the Xring O1, designed for the latest smartphones and tablets, including the Xiaomi 15S Pro and the Xiaomi Pad 7 Ultra. Skepticism surfaced regarding the level of innovation in this chip, as it’s based on standard ARM cores. However, a detailed analysis by Geekerwan has revealed that the Xring O1 is far more customized than initially thought.

Power Under the Hood: A Closer Look at the Architecture

Manufactured on TSMC's advanced N3E node, similar to MediaTek's Dimensity 9400, the Xring O1 showcases a unique architecture. Unlike typical designs, it features not one, but two Cortex-X925 prime cores. Xiaomi has opted for two Cortex-A725 variants instead of the usual Cortex-X4, along with two low-power A520 cores for added efficiency.

Efficiency Meets Performance: A Hybrid Core Strategy

The inventive design of the Cortex-A725 cores stands out, with four high-performance cores paired with two efficiency-optimized cores. This configuration allows the Xring O1 to seamlessly switch between cores, enhancing power savings without sacrificing speed. This efficiency leads to a compelling conclusion: the Xring O1 surpasses the Dimensity 9400 in CPU performance and energy efficiency, nearing the prowess of Qualcomm’s Snapdragon 8 Elite.

Compact Yet Powerful: Size Comparisons with Competitors

Measuring only 109mm², the Xring O1 is comparable in size to Apple’s A18 Pro. Still, both Xiaomi and Apple utilize external modems, while competitors like the Dimensity 9400 and Snapdragon 8 Elite incorporate built-in modems, affecting overall chip size and power management.

Revolutionary Cache Design: No SLC, All Speed!

In a departure from typical designs laden with multiple megabytes of System Level Cache (SLC), the O1 opts for abundant on-chip cache. It features a remarkable 16MB of L3 cache shared among all 10 cores, alongside dedicated L2 caches for the prime and efficiency cores, resulting in lightning-fast data retrieval.

Custom Innovations: NPU and ISP